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| BIOS Optimization Guide (BOG) This is the place to discuss everything about the BIOS Optimization Guide as well as post new or uncovered BIOS options! |
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| | #61 (permalink) |
| Newbie Join Date: 2 Jun 2003
Posts: 1
Reputation: 0 ![]() Rep Power: 0 | Not exactly a common bios option as it is in a modded bios, but I figure why not try? BIOS Option : CPU Multi Factor Writeback Options : Enabled, Disabled Description : NONE Motherboard : ABIT KG7-RAID Chipset : AMD 761/VIA 686B Thanks for the site, it has helped me many times before. |
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| | #62 (permalink) |
| Newbie Join Date: 6 Jun 2003
Posts: 1
Reputation: 0 ![]() Rep Power: 0 | The guide has ALOT of undocumented Gigabyte 8KNXP BIOS options.. and I mean ALOT. I'd really like you to further explain some of the BIOS on this mobo. Here's the PDF file of the Manual that covers the BIOS Setup: http://asia.giga-byte.com/MotherBoar...8knxpu_e_3.pdf This manual shows all of the BIOS settings the board has, and even briefly explains each setting. The guide is missing stuff even from the Standart CMOS settings.. such as Halton, Base Memory, Extended Memory.. and the list goes on. Heck, the Integrated Peripherals page has so many un-documented settings ! I hope you could sit one day and fill the blanks PS i love your guide |
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| | #63 (permalink) |
| Newbie Join Date: 7 Jun 2003
Posts: 1
Reputation: 0 ![]() Rep Power: 0 | Award Bios, Asus A7V8X, ACPI Bios rev. 1012, Via VT8377/VT8235, 512K. Bios option= AGP Performance Control Options= enabled, disabled Description= unknown Bios option= S2K Bus Driving Control Options= auto, manual Description= unknown |
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| | #64 (permalink) |
| Newbie Join Date: 2 Jul 2003
Posts: 4
Reputation: 0 ![]() Rep Power: 0 | BIOS Option : "Post memory write enable", enable or disbale Description : No Motherboard : Gigabyte GA-7DPXDW, it is hidden by default, but they e-mail a service bios with this setting unhide, but no explain for it. Chipset : AMD MPX About "AGP secondary Lat timer" from: http://www.orpheuscomputing.com/downloads2/KG7-RAID.pdf Choose the address to the definition of the latency timer in the PCI Local Bus Spec. But this only applies to the secondary interface of a PCI to PCI bridge |
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| | #65 (permalink) |
| Newbie Join Date: 9 Jul 2003
Posts: 1
Reputation: 0 ![]() Rep Power: 0 | BIOS Option : SM I/O Buffers Control Options : Normal, 5555, 5454, 4444, 3333, 2222, 1212 Description : ?????????????????????????????????????? Motherboard : Aopen AX3S Chipset : Intel 815E, ICH2 Can anyone shed more light on the above Bios option? |
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| | #66 (permalink) |
| Newbie Join Date: 11 Jul 2003
Posts: 6
Reputation: 0 ![]() Rep Power: 0 | BIOS Option : Memory Parity/ECC Check Options : Enabled, Disabled,Auto Description : Memory checking when BIOS detects the presence of ECC or parity DRAM Motherboard : MSI K7T Turbo (v.3.0) (BIOS 3.6) Chipset : VIA KT133A BIOS Option : SDRAM Active Precharge Delay Options : 5T,6T,7T,8T Description :Controls the number of DDR SDRAM clocks used for DDR SDRAM Parameters Motherboard : ASUS A7V8X (BIOS 1012) Chipset : VIA KT400 BIOS Option : ΙDΕ Prefetch Mode Options : Enabled, Disabled Description : Enables or disables the IDE R/W Prefetch buffer.This buffer is used to store data for faster performances. Motherboard : MSI K7T Turbo (v.3.0) (BIOS 3.6) Chipset : VIA KT133A BIOS Option : ACPI Function Options : Enabled, Disabled Description : Enables or disables the Advanced Configuration and Power Management Motherboard : MSI K7T Turbo (v.3.0) (BIOS 3.6) Chipset : VIA KT133A BIOS Option : Power Management Options : Max Saving, User Define, Min Saving Description : The type (or degree) of power saving for Doze, Suspend, Standby modes Motherboard : MSI K7T Turbo (v.3.0) (BIOS 3.6) Chipset : VIA KT133A
__________________ Greece 1)Athlon 2000+ @ 2100+, ASUS A7V8X,Sapphire Radeon 7500 @ 286/208 2)Athlon 1800+, MSI K7T TURBO,ATI Xpert 2000 @ 134/119 |
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| | #67 (permalink) |
| Newbie Join Date: 11 Jul 2003
Posts: 6
Reputation: 0 ![]() Rep Power: 0 | BIOS Option : Onboard LAN Boot ROM Options : Disabled, Enabled Description : Motherboard : ASUS A7V8X (BIOS 1012) Chipset : VIA KT400 BIOS Option : Onboard ATA device First Options : No, Yes Description : Motherboard : ASUS A7V8X (BIOS 1012) Chipset : VIA KT400 BIOS Option : Interrupt Mode Options : PIC, APIC Description : The Advance Programmable Interrupt Controller (APIC) setting allows you to distribute interrupt routings other than the 16 IRQs. The Programmable Interrupt Controller (PIC) setting allows you to user the 16 IRQs only. Motherboard : ASUS A7V8X (BIOS 1012) Chipset : VIA KT400 And of course all power options Motherboard : ASUS A7V8X (BIOS 1012) Chipset : VIA KT400 I think you have a lot to think ....
__________________ Greece 1)Athlon 2000+ @ 2100+, ASUS A7V8X,Sapphire Radeon 7500 @ 286/208 2)Athlon 1800+, MSI K7T TURBO,ATI Xpert 2000 @ 134/119 |
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| | #68 (permalink) |
| Da Boss Join Date: 10 Oct 2002 Location: In front of my BenQ Joybook 7000 notebook!
Posts: 29,436
Reputation: 2830 ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() Rep Power: 63 | Spyrus, thanks for the posts. I will try to cover as many as I can in the next update. But some of them are already in the BIOS Optimization Guide. Just under different names. For example, Onboard ATA Device First, Interrupt Mode, Memory Parity/ECC Check, SDRAM Active Precharge Delay.
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| | #69 (permalink) |
| Newbie Join Date: 19 Jul 2003
Posts: 1
Reputation: 0 ![]() Rep Power: 0 | BIOS Option: RAS Pulse Width Refresh Options: 4T, 5T, 6T, 7T Description: Specifies the number of clocks required to assert the DRAM row address strobe (RAS) signal for refresh cycles. (http://ftp.iasi.roedu.net/Drivers/Mo...h/Ap59-awd.pdf) BIOS Option: RAS to CAS Delay Options: 2T, 3T, 4T, 5T Description: Allows you to set the wait state between row address strobe (RAS) and column address strobe (CAS) signals. (http://ftp.iasi.roedu.net/Drivers/Mo...h/Ap59-awd.pdf) Motherboard: SIS 5600 Chipset: ? |
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| | #70 (permalink) |
| Newbie Join Date: 25 Jul 2003
Posts: 1
Reputation: 0 ![]() Rep Power: 0 | BIOS Option: OS/2 Onboard Memory > 64M Please, take http://hobbes.nmsu.edu/pub/os2/syste...s/patchldr.zip and read patchldr.doc. There can be your description becomes more full. I hope, that could help You. |
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