I'm yet to see SMT doing any good for the Core architecture since it is a pretty efficient scheduler in the first place, who knows if Intel improved in a way where it actually provides tangible performance benefits for the minimum amount of extra transistors and rework to the dataflow direction. Pretty exciting nonetheless.
LOL, I've always liked HT whether it does anything or not. In my case, (2.6C P4) it does make a difference so I'll be eager to see how they manage using HT with multiple cores. Also, it could be just to make AMD's new CPU look like poo.
it's not the first time intel using HT on multi-core processor.. i haf seen it on one of the first with dual-processor dual-core xeons (2cpu x 2core each x 2 virtual core)
^ it was never a problem on the Netburst Architecture due to its already bad inherent ILP and window scheduler, and heck it even came in the EE version of the P4 Smithfield. The great big hoo haah here is Intel implementing it on the Core architecture, an already very efficient beast with very impresive ILP, ops fusion and very accurate prefech at that. My question is, is it going to be as awesome as the time when it came to the P4?
Putting a HT is still fine as long as the software and the architectures for HT will be improved as well. Fortunately, HT can give a max 30 percent boost in certain applications.
^ that's why i'm quite exicted, such things things aren't as easily implemented across architectures, and even if you get a 20 percent performance boost for HT, coupled with superior speed from Intel's new Low K dielectrics and Metal Gate technology with the 45nm process, AMD will have alot on its hands even with the K8L. Go Go Intel Innovation!
Fanboy? Although I won't pretend to understand what you're all trying to say, 45nm must mean better efficiency!
^I'm only a fanboy when they deliver the goods, like any good gold digger i'm only in support when they can give me the best Anyways what does 45nm spell for us the consumer. Firstly, it means that the silicon wall, which scientists said spelled doom for silicon has been totally p4wned with the help of High-K dielectric, leakage current has been reduced meaning that processors can be pushed even further than before. How does High-K help, well dielectrics are supposed to be insulators, just so happens that silicon isn't as good an insulator as High-K, and as voltage attemps to cross it's barriers, it acts like a capacitor which introduces parasitic capacitance. Obviously anything with a lower dielectric constant is better, which is what high-K is. The higher the kappa and the more intergratable it is into the original process, the better. Second is metal gates, which can switch almost 50 times faster than normal polysilicon ones, and much more efficiently at that. What does that mean to us? Speed babeh...speed! Plus far less power consumption than just jumping to a smaller pitch process. I forsee many gigahurtz....
"fanbody when they deliver the good", lol.. so i suppose u dun take any side? there will always be a break-thru, it's juz a matter of time...
